After successful completion of the course, students are able to

•  perform an efficient HW/SW partitioning for a given problem
•  understand the implications of a decision for a HW- or a SW-implementation
• develop and integrate custom hardware components for a soft-core processor
•  complete autonomously a small challenging problem in a team
•  accomplish time management for a small project

Solution of a practical assignment from the field of HW-SW codesign - design, commissioning and optimisation of a complete system consisting of a processor, self-designed HW modules (FPGA), software (including drivers). Examples of necessary steps are:

• Code optimization (C-level)
• Rewriting code in assembly when compilers do not achieve the optimum
• Adding application-specific instructions to perform common operations to the instruction set of the processor
• Transferring functionality into hardware (designing (or finding) appropriate modules and integrating them)

The students learn to handle the soft-core processor Nios II from Intel and the corresponding tools such as the Platform Designer and Quartus. There is furthermore a major focus on giving the students a lot of room to make their own decisions.

ECTS Breakdown

98.5 h    Solving the task assignments
      4 h    Preparation of the mid-term presentation
      4 h    Preparation of the final presentation
      6 h    Presence at the presentations/exercise interviews
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112.5 h ( = 4.5 ECTS)

demonstration of the acchieved solution to the supervisor and defence of implemenation details
presentation of a proper concept to the remaining groups and discussion of chosen design decisions

• VHDL hardware design
• C Software development
• Computer architecture - instruction set, pipelining, memory organisation (SRAM, DRAM, I-/D-cache, scratchpad, register)
• Understanding of algorithms - loop unrolling, pipelining, parallelization