182.693 Digital Design
This course is in all assigned curricula part of the STEOP.
This course is in at least 1 assigned curriculum part of the STEOP.

2018W, VO, 3.0h, 3.0EC
TUWEL

Properties

  • Semester hours: 3.0
  • Credits: 3.0
  • Type: VO Lecture

Aim of course

Students having passed this course can

  • desrcibe the design and fabrication flows of a digital CMOS ASIC, justify their steps and list the challenges involved in them,
  • correctly apply the abstraction of a field-effect transistor as a switch and use it to explain the basic function of simple logic gates,
  • describe implementation and operation of fundamental function blocks of digital logic, and apply them properly,
  • design a (combinational or simple sequential) digital circuit solving a given problem, and compare implementation options
  • identify, in an application, the limits of the models and abstractions used in digital design, and appropriately account for them
  • relate defects and functional faults in a digital integrated circuit to their potential cause in the design and fabrication flow, and describe the effect ot the most relevant parameters of influence in a qualitative and, where possible, a quantitative way.

Subject of course

  • logic optimization
  • structure and specifications of logic gates
  • basic arithmetic circuits (adder, multiplier)
  • I/O features (schmitt trigger, open collector, ...) 
  • power dissipation and cooling 
  • synchronous logic, limitations, state machines
  • metastability
  • memory types 
  • VLSI design flow
  • simulation of hardware
  • target technologies for VLSI designs 
  • chip manufacturing process 
  • defects and testing

Didactic concept: This is a classical lecture. The whole material is presented in lectures, in theory as well as with a relation to practical application. Example calculations are made during the lecture to facilitate the preparation for the final exam, and to show quantitative results and relations. During one lecture an experiment is made showing the "speed signal propagation" in an intuitive way. The lecture slides including numerous animations are available on the homepage. For the preparation of the final exam a collection of past exams is also available.

Additional information

Introductory lecture is on Oct 1, 10:15  in lecture hall HS13

 

ECTS Breakdown:

36h ... lecture time
39h ... continuous engagement with the lecture contents, preparation time for final exam
-----------------
75h ... corresponding to 3ECTS

Lecturers

Institute

Course dates

DayTimeDateLocationDescription
Mon10:00 - 12:0001.10.2018 - 21.01.2019HS 13 Ernst Melan - RPL Lecture
Fri11:00 - 13:0005.10.2018 - 18.01.2019EI 10 Fritz Paschke HS - UIW Lecture
Digital Design - Single appointments
DayDateTimeLocationDescription
Mon01.10.201810:00 - 12:00HS 13 Ernst Melan - RPL Lecture
Fri05.10.201811:00 - 13:00EI 10 Fritz Paschke HS - UIW Lecture
Mon08.10.201810:00 - 12:00HS 13 Ernst Melan - RPL Lecture
Fri12.10.201811:00 - 13:00EI 10 Fritz Paschke HS - UIW Lecture
Mon15.10.201810:00 - 12:00HS 13 Ernst Melan - RPL Lecture
Fri19.10.201811:00 - 13:00EI 10 Fritz Paschke HS - UIW Lecture
Mon22.10.201810:00 - 12:00HS 13 Ernst Melan - RPL Lecture
Mon29.10.201810:00 - 12:00HS 13 Ernst Melan - RPL Lecture
Mon05.11.201810:00 - 12:00HS 13 Ernst Melan - RPL Lecture
Fri09.11.201811:00 - 13:00EI 10 Fritz Paschke HS - UIW Lecture
Mon12.11.201810:00 - 12:00HS 13 Ernst Melan - RPL Lecture
Fri16.11.201811:00 - 13:00EI 10 Fritz Paschke HS - UIW Lecture
Mon19.11.201810:00 - 12:00HS 13 Ernst Melan - RPL Lecture
Fri23.11.201811:00 - 13:00EI 10 Fritz Paschke HS - UIW Lecture
Mon26.11.201810:00 - 12:00HS 13 Ernst Melan - RPL Lecture
Fri30.11.201811:00 - 13:00EI 10 Fritz Paschke HS - UIW Lecture
Mon03.12.201810:00 - 12:00HS 13 Ernst Melan - RPL Lecture
Fri07.12.201811:00 - 13:00EI 10 Fritz Paschke HS - UIW Lecture
Mon10.12.201810:00 - 12:00HS 13 Ernst Melan - RPL Lecture
Fri14.12.201811:00 - 13:00EI 10 Fritz Paschke HS - UIW Lecture

Examination modalities

The examination is written only and comprises a theory part (about 8 short questions) and (about 3) problems. For more information and list of dates see homepage. There you can also find past exams.

Exams

DayTimeDateRoomMode of examinationApplication timeApplication modeExam
Tue11:00 - 13:0002.07.2024Informatikhörsaal - ARCH-INF written02.05.2024 00:00 - 30.06.2024 23:59TISSEnd of study year exam

Course registration

Not necessary

Curricula

Study CodeObligationSemesterPrecon.Info
033 535 Computer Engineering Mandatory3. SemesterSTEOP
Course requires the completion of the introductory and orientation phase

Literature

No lecture notes are available.

Preceding courses

Continuative courses

Miscellaneous

Language

German