After successful completion of the course, students are able to apply the knowledge about the basics of computer architecture to the presented systems as well as to other computing systems. They understand the hardware/software interface and what determines the program performance as well as how system performance can be evaluated. Moreover, the students will learn how hardware designers can help to improve performance by techniques like pipelining and caching and will be able to apply and transfer this knowledge to other processor architectures and systems.

This lecture will be given in English and is based on the textbook Computer Organization and Design.

The lecture will cover the following topics:

• Performance evaluation
• Instruction Set Architecture and Assembler (RISC-V)
• Computer arithmetic
• Addressing
• ALU
• Fixed point and floating point representation
• Processors
• Data- and Control-Path
• Pipelining and pipeline hazards
• Memory hierarchy
• Registers
• Caches
• Main memory, virtual memory
• I/O-systems

Lecture slides, textbook, presentation of examples and calculations, code examples

In case switching from classroom teaching to online teaching is required, the following changes will be made:

• Instead of classroom teaching, recordings of the lectures will be provided
• Exams: Will either take place as soon as accessing the lecture halls is possible or they will be held online

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!!! Please take note of the plan for the lecture appointments in the slide set "VO0 - Organization" (available in the TUWEL course) !!!
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Textbook:
D.A. Patterson, J.L. Hennessy: Computer Organization and Design RISC-V Edition: The Hardware Software Interface

Final written exam.

Textbook:
D.A. Patterson, J.L. Hennessy: Computer Organization and Design RISC-V Edition: The Hardware Software Interface