The innovation towards the „Distributed Integrated Modular Avionics“ and the „More Electric Aircraft“ (MEA) transformed the mechanical control of aircraft sub-systems to electric/electronic control. By that the innovation has significantly contributed to reducing the aircraft complexity and at the same time increased its reliability. Since many years the aerospace industry relies on communication systems such as ARINC664 p.7 (AFDX) i.e. for modern passenger aircraft sub-system data communication. Already many of the sub-systems use this technology both, internal of the sub-system and for closing control loops as well as for the communication to the cockpit and the avionics bay. Despite the high degree of technological advance achieved with AFDX, it is limited w.r.t. closing fast control loops due to its inherent jitter. Furthermore, it lacks in security measures built-in allowing to advance from MEA towards the „Digitized, Connected Aircraft“ (DCA). By researching and investigating opportunities to deploy Deterministic Ethernet (DE) as a novel platform and backbone architecture, the INNAS consortium will endeavor to enable digitization of the next generation of aircraft towards DCA. For this purpose and to allow connection to the internet as central brick to digitization, the investigations will further target to integrate an effective protection concerning measures for improved security preventing unauthorized access to the aircraft backbone data communication platform on hardware level. Furthermore, the consortium will research measures to investigate the reliability of eASIC components that will carry the IP of such backbone architecture network components. Since detailed simulation models of such components is generally not communicated by the manufacturer, these investigations shall be conducted starting from the individual transistor on the device used for a network DE switch developed within the project. Finally, the resulting backbone architecture and platform shall eliminate the limiting factor for fast control loops and shall investigate, research and implement the support for the integration of “mixed criticality” sub-systems on the backbone architecture.