After successful completion of the course, students are able to practice various procedures of designing a System on Chip, the architecture design, IP purchase, (FPGA) implementation flow. Students should also be able to practice some hardware verification techniques.

Please see the new SoC Lab Design course (384.178) here  https://tiss.tuwien.ac.at/course/courseAnnouncement.xhtml?dswid=3189&dsrid=273&courseNumber=384178&courseSemester=2020W

The lab contains various procedures of designing a System on Chip. The architecture design, IP purchase, (FPGA) implementation flow, and test are among those.

Hardware Verifications concepts and Industrial standards.

Investigating and developing projects for FPGA design flow

Hardware verification tools - System Verilog

You should be able to actively participate in a group work of system development.

To obtain more information about the content and procedure of the course, please attend the introductory session on Tuesday, October 2nd, 2018 at the Rechnerraum of ICT (CA0208).

There is no written exam foreseen for this course.

The marking scheme will be handed out in the lecture, based on which and according to the practical works of students a final mark will be determined.

Please don't forget to register as soon as possible if you plan to attend the course.

You should have a working knowledge of System on Chip (SoC), Embedded Systems, SoC Architecture Design (e.g., have passed 384.156 and/or 384.154)