384.157 SoC Design Laboratoy
This course is in all assigned curricula part of the STEOP.
This course is in at least 1 assigned curriculum part of the STEOP.

2018W, UE, 3.0h, 4.5EC

Properties

  • Semester hours: 3.0
  • Credits: 4.5
  • Type: UE Exercise

Aim of course

During this course, you will gain a first-hand hands-on experience on designing, (FPGA) prototyping and testing of a System on Chip. You will also experience various issues related to this process.

Subject of course

The lab contains various procedures of designing a System on Chip. The architecture design, IP purchase, (FPGA) implementation flow, and test are among those.

Additional information

You should be able to actively participate in a group work of system development.

To obtain more information about the content and procedure of the course, please attend the introductory session on Tuesday, October 2nd, 2018 at the Rechnerraum of ICT (CA0208).

Lecturers

Institute

Course dates

DayTimeDateLocationDescription
Tue13:00 - 14:0002.10.2018 CA0208 - Rechnerraum (Computer Room)Introductory Session
Tue13:00 - 15:3009.10.2018 - 29.01.2019 CA0208 - RechnerraumSoC Design Lab
Wed13:00 - 15:3013.03.2019 ICT RechnerraumFinal Presentation (Demo)
SoC Design Laboratoy - Single appointments
DayDateTimeLocationDescription
Tue02.10.201813:00 - 14:00 CA0208 - Rechnerraum (Computer Room)Introductory Session
Tue09.10.201813:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue16.10.201813:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue23.10.201813:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue30.10.201813:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue06.11.201813:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue13.11.201813:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue20.11.201813:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue27.11.201813:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue04.12.201813:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue11.12.201813:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue18.12.201813:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue08.01.201913:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue15.01.201913:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue22.01.201913:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Tue29.01.201913:00 - 15:30 CA0208 - RechnerraumSoC Design Lab
Wed13.03.201913:00 - 15:30 ICT RechnerraumFinal Presentation (Demo)

Examination modalities

There is no written exam foreseen for this course.

The marking scheme will be handed out in the lecture, based on which and according to the practical works of students a final mark will be determined.

Course registration

Use Group Registration to register.

Curricula

Study CodeObligationSemesterPrecon.Info
066 504 Master programme Embedded Systems Not specified

Literature

No lecture notes are available.

Previous knowledge

You should have a working knowledge of System on Chip (SoC), Embedded Systems, SoC Architecture Design (e.g., have passed 384.156 and/or 384.154)

Preceding courses

Language

English