384.095 Advanced Methods for Circuit Design
This course is in all assigned curricula part of the STEOP.
This course is in at least 1 assigned curriculum part of the STEOP.

2015W, VU, 4.0h, 7.0EC

Properties

  • Semester hours: 4.0
  • Credits: 7.0
  • Type: VU Lecture and Exercise

Aim of course

Digital circuits are not designed manually any more. Today, digital circuits are created from a specification given in a "Hardware Description Language" (HDL) in a mostly automatic way ("Synthesis"). Depending on the level of abstraction, we differntiate differnt kind of synthesis. This lecture deals with the modelling, simulation, design of digital circuits, design of analog mixed-signal circuits, complete system on chip (SoC) solutionas and the synthesis from abstract system descriptions (High Level Synthesis).

Subject of course

Defined above

Lecturers

  • Schupfer, Florian
  • Rathmair, Michael

Institute

Course dates

DayTimeDateLocationDescription
Wed10:00 - 11:0007.10.2015Seminarraum 384 VU Advanced Methods in Circuit Design, preview
Wed13:00 - 15:0014.10.2015Seminarraum 384 Introduction
Wed13:00 - 15:0021.10.2015Seminarraum 384 Canceled lecture
Wed13:00 - 15:0028.10.2015Seminarraum 384 SoC Technologies and Applications
Wed13:00 - 15:0004.11.2015Seminarraum 384 Modelling and Simulation 1
Fri10:00 - 12:0013.11.2015Seminarraum 384 Modelling and Simulation 2
Wed13:00 - 15:0018.11.2015Seminarraum 384 High Level Synthesis
Wed13:00 - 15:0025.11.2015Seminarraum 384 Advanced Structures
Wed13:00 - 15:0002.12.2015Seminarraum 384 Embedded Software
Thu08:00 - 17:0003.12.2015 computer room ICT-CA208Lab1 -Vivado and SoC Design
Wed08:00 - 17:0020.01.2016 computer room ICT-CA208Lab2 - High Level Synthesis lab

Examination modalities

Written examination

Practical exercises have to be completed successfully.

Course registration

Use Group Registration to register.

Group Registration

GroupRegistration FromTo
Lab group 108.10.2015 12:0030.10.2015 12:00
Lab group 208.10.2015 12:0030.10.2015 12:00
Lab group 308.10.2015 12:0030.10.2015 12:00
Lab group 408.10.2015 12:0030.10.2015 12:00
Lab group 508.10.2015 12:0030.10.2015 12:00
Lab group 608.10.2015 12:0030.10.2015 12:00
Lab group 708.10.2015 12:0030.10.2015 12:00
Lab group 805.10.2015 12:0030.10.2015 12:00
Lab group 905.10.2015 12:0030.10.2015 12:00
Lab group 1005.10.2015 12:0030.10.2015 12:00

Curricula

Study CodeObligationSemesterPrecon.Info
066 438 Computer Technology Not specified
066 439 Microelectronics Not specified
066 507 Telecommunications Mandatory elective

Literature

Lecture slides for this course are available and publsihed via TISS: - Neil H.E. Weste, Kamran Eshraghian: Principles of CMOS VLSI Design, A Systems Perspective. Addison Wesley, 1992, 2nd edition. ISBN 0-201-53376-6. - Dan Clein: CMOS IC Layout. Newnes, 1999. ISBN 0-7506-7194-7. - Sachin Sapatnekar: Timing. Kluwer Academic Publishers. ISBN 1-4020-7671-1. - Richard Munden: ASIC & FPGA Verification. Morgan Kaufman. ISBN 0-12-510581-9. - Jürgen Reichardt, Bernd Schwarz: VHDL-Synthese, Entwurf digitaler Schaltungen und Systeme. 4. Auflage, OldenbourgVerlag, 2007, ISBN 978-3-486-58192-8. - Peter J. Ashenden: The Designer's Guide toVHDL. Morgan Kaufmann Publishers, 2002, ISBN 1-55860-674-2. - Gunther Lehmann, Bernhard Wunder, Manfred Selz: Schaltungsdesign mit VHDL. Franzis , ISBN 3-7723-6163-3. - Paul Molitor, Jörg Ritter: VHDL Eine Einführung. Pearson Studium. ISBN 3-8273-7047-7. - IEEE Std. 1076 (VHDL) - IEEE Std. 1077.6 (VHDL SIWG).

Accompanying courses

Continuative courses

Language

German