Goal of the lecture is to develop a digital ASIC of a written specification. The usage of modern asic development tools will be practiced.
Laboratory practice is essentially divided into two parts, a guided part dealing with selected aspects of the design of digital ASICs and a practical part in which the mediated knowledge is to be applied.
The laboratory exercise is carried out in the form of small groups in the size of a maximum of two persons. The laboratory exercise is divided into three parts. In doing so, the complexity of the task, which is to be designed and implemented, increases.
02.03 13: 30-14: 00 CD0404 Shami preliminary discussion
20. April 17:00 Deadline Task 1, 25. May 17:00 Deadline Task 2, 29. June 17:00 Deadline Task 3 -Late Submission will cost you 50% of the marks
In the case of more registrations than places, students with an active relevant master degree (066 438, 066 439, 066 504, 066 507 and 066 508) are preferably admitted to students of other subjects. Within these groups the lot decides on the allocation of the space.
The assessments are made based on the implemented tasks. The maximum achievable points for the tasks are 15, 35 and 50 points. The LVA is positively completed from 50 points, the other assessment steps are 62.5 points, 75 points and 87.5 points.
There is a possibility to place the tasks on the ICT in the computer room on Thursdays. Please send your deadline to the LVA management office 2 days before the deadline.
The student must have at least 1 of the course(s) completed listed below:
Lecture notes for this course are available. The actual versions can be accessed over TISS.
Books mentioned in the section "Links" can be accessed digitaly from within thin TU network.
Knowledge of Hardware Descriptive languages like VHDL/Verilog with good understanding of Digital System design, Computer Architecture
