384.086 Digital Integrated Circuits
This course is in all assigned curricula part of the STEOP.
This course is in at least 1 assigned curriculum part of the STEOP.

2017W, VU, 2.0h, 3.0EC

Properties

Semester hours: 2.0
Credits: 3.0
Type: VU Lecture and Exercise

Aim of course

To learn and apply various methods and principles for digital chip design.

Subject of course

See the German version.

Additional information

See the German text.

Lecturers

Jantsch, Axel
Rathmair, Michael
Taherinejad, Nima
Pudukotai Dinakarrao, Sai Manoj

Institute

E384 Institute of Computer Technology

Course dates

Day	Time	Date	Location	Description
Tue	09:15 - 11:00	03.10.2017 - 23.01.2018	EI 3A Hörsaal	Digitale Integrierte Schaltungen

Show single appointments

Digital Integrated Circuits - Single appointments

Day	Date	Time	Location	Description
Tue	03.10.2017	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	10.10.2017	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	17.10.2017	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	24.10.2017	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	31.10.2017	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	07.11.2017	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	14.11.2017	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	21.11.2017	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	28.11.2017	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	05.12.2017	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	12.12.2017	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	19.12.2017	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	09.01.2018	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	16.01.2018	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen
Tue	23.01.2018	09:15 - 11:00	EI 3A Hörsaal	Digitale Integrierte Schaltungen

Examination modalities

See the German explanation.

Exams

Day	Time	Date	Room	Mode of examination	Application time	Application mode	Exam
Mon	15:00 - 17:00	13.05.2024	Büro Jantsch	oral	15.04.2024 23:59 - 09.05.2024 23:59	TISS	DIS Prüfung (Stoff WS 2023)

Group dates

Group	Day	Time	Date	Location	Description
03. Nov'17, 09-12: Practice time for DIS Lab 1 (Optional)	Fri	09:00 - 12:00	03.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	Practice time for DIS Task 1 (Optional)
03. Nov'17, 1330-1630: Practice time for DIS Lab 1 (Optional)	Fri	13:30 - 16:30	03.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	Practice time for DIS Lab 1 (Optional)
06. Nov'17, 09-12: Practice time for DIS Lab 1 (Optional)	Mon	09:00 - 12:00	06.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	Practice time for DIS Lab 1 (Optional)
06. Nov'17, 1330-1630: Practice time for DIS Lab 1 (Optional)	Mon	13:30 - 16:30	06.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	Practice time for DIS Lab 1 (Optional)
07. Nov'17, 1330-1630: Practice time for DIS Lab 1 (Optional) 2	Tue	13:30 - 16:30	07.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	Practice time for DIS Lab 1 (Optional)
08. Nov'17, 09-12: DIS Lab 1 submission	Wed	09:00 - 12:00	08.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	DIS Lab 1 submission
08. Nov'17, 1330-1630: DIS Lab 1 submission	Wed	13:30 - 16:30	08.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	DIS Lab 1 submission
09. Nov'17, 09-12: DIS Lab 1 submission	Thu	09:00 - 12:00	09.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	DIS Lab 1 submission
09. Nov'17, 1330-1630: DIS Lab1 submission	Thu	13:30 - 16:30	09.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	DIS Lab 1 submission
10. Nov'17, 09-12: DIS Lab 1 submission	Fri	09:00 - 12:00	10.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	DIS Lab 1 submission
10. Nov'17, 1330-1630: DIS Lab 1 submission	Fri	13:30 - 16:30	10.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	DIS Lab 1 submission
17. Nov'17, 09-12: Practice time for DIS Lab 2 (Optional)	Fri	09:00 - 12:00	17.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	Practice time for DIS Lab 2 (Optional)
17. Nov'17, 1330-1630: Practice time for DIS Lab 2 (Optional)	Fri	13:30 - 16:30	17.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	Practice time for DIS Lab 2 (Optional)
20. Nov'17, 09-12: Practice time for DIS Lab 2 (Optional)	Mon	09:00 - 12:00	20.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	Practice time for DIS Lab 2 (Optional)
20. Nov'17, 1330-1630: Practice time for DIS Lab 2 (Optional)	Mon	13:30 - 16:30	20.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	Practice time for DIS Lab 2 (Optional)
21. Nov'17, 1330-1630: Practice time for DIS Lab 2 (Optional)	Tue	13:30 - 16:30	21.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	Practice time for DIS Lab 2 (Optional)
22. Nov'17, 09-12: DIS Lab 2 submission	Wed	09:00 - 12:00	22.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	DIS Lab 2 submission
22. Nov'17, 1330-1630: DIS Lab 2 submission	Wed	13:30 - 16:30	22.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	DIS Lab 2 submission
23. Nov'17, 09-12: DIS Lab 2 submission	Thu	09:00 - 12:00	23.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	DIS Lab 2 submission
23. Nov'17, 1330-1630: DIS Lab 2 submission	Thu	13:30 - 16:30	23.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	DIS Lab 2 submission
24. Nov'17, 09-12: DIS Lab 2 submission	Fri	09:00 - 12:00	24.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	DIS Lab 2 submission
24. Nov'17, 1330-1630: DIS Lab 2 submission	Fri	13:30 - 16:30	24.11.2017	Rechnerraum CA0208 (2. Stock, ICT)	DIS Lab 2 submission

Course registration

Begin	End	Deregistration end
03.10.2017 10:45	17.10.2017 18:00	17.10.2017 18:00

Registration modalities

Registration is necessary to successfully complete the course, to download the slides and attend the labratories.

Group Registration

Group	Registration From	To
03. Nov'17, 09-12: Practice time for DIS Lab 1 (Optional)	02.10.2017 08:00	02.11.2017 23:59
03. Nov'17, 1330-1630: Practice time for DIS Lab 1 (Optional)	02.10.2017 08:00	02.11.2017 23:59
06. Nov'17, 09-12: Practice time for DIS Lab 1 (Optional)	02.10.2017 08:00	02.11.2017 23:59
06. Nov'17, 1330-1630: Practice time for DIS Lab 1 (Optional)	02.10.2017 08:00	02.11.2017 23:59
07. Nov'17, 1330-1630: Practice time for DIS Lab 1 (Optional) 2	02.10.2017 08:00	02.11.2017 23:59
08. Nov'17, 09-12: DIS Lab 1 submission	02.10.2017 08:00	07.11.2017 23:59
08. Nov'17, 1330-1630: DIS Lab 1 submission	02.10.2017 08:00	07.11.2017 23:59
09. Nov'17, 09-12: DIS Lab 1 submission	02.10.2017 08:00	07.11.2017 23:59
09. Nov'17, 1330-1630: DIS Lab1 submission	02.10.2017 08:00	07.11.2017 23:59
10. Nov'17, 09-12: DIS Lab 1 submission	02.10.2017 08:00	07.11.2017 23:59
10. Nov'17, 1330-1630: DIS Lab 1 submission	02.10.2017 08:00	07.11.2017 23:59
17. Nov'17, 09-12: Practice time for DIS Lab 2 (Optional)	02.10.2017 08:00	16.11.2017 23:59
17. Nov'17, 1330-1630: Practice time for DIS Lab 2 (Optional)	02.10.2017 08:00	16.11.2017 23:59
20. Nov'17, 09-12: Practice time for DIS Lab 2 (Optional)	02.10.2017 08:00	16.11.2017 23:59
20. Nov'17, 1330-1630: Practice time for DIS Lab 2 (Optional)	02.10.2017 08:00	16.11.2017 23:59
21. Nov'17, 1330-1630: Practice time for DIS Lab 2 (Optional)	02.10.2017 08:00	16.11.2017 23:59
22. Nov'17, 09-12: DIS Lab 2 submission	02.10.2017 08:00	22.11.2017 23:59
22. Nov'17, 1330-1630: DIS Lab 2 submission	02.10.2017 08:00	22.11.2017 23:59
23. Nov'17, 09-12: DIS Lab 2 submission	02.10.2017 08:00	22.11.2017 23:59
23. Nov'17, 1330-1630: DIS Lab 2 submission	02.10.2017 08:00	22.11.2017 23:59
24. Nov'17, 09-12: DIS Lab 2 submission	02.10.2017 08:00	22.11.2017 23:59
24. Nov'17, 1330-1630: DIS Lab 2 submission	02.10.2017 08:00	22.11.2017 23:59

Curricula

Study Code	Obligation	Semester
066 438 Computer Technology	Not specified	1. Semester
066 439 Microelectronics	Not specified	1. Semester
066 504 Master programme Embedded Systems	Mandatory	1. Semester
066 507 Telecommunications	Mandatory
066 508 Microelectronics and Photonics	Mandatory	1. Semester

Literature

Reichardt, Jürgen, Lehrbuch Digitaltechnik, Oldenbourg Verlag, 2013.

Kesel, Frank / Bartholomä, Ruben, Entwurf von digitalen Schaltungen und Systemen mit HDLs und FPGAs, Oldenbourg Verlag, 2013

Go to Course Materials

Continuative courses

Language

German