Coronavirus - Informations and Recommendations:

354.064 Advanced Course Circuit Design
This course is in all assigned curricula part of the STEOP.
This course is in at least 1 assigned curriculum part of the STEOP.

2019W, VU, 4.0h, 6.0EC, to be held in blocked form


  • Semester hours: 4.0
  • Credits: 6.0
  • Type: VU Lecture and Exercise

Learning outcomes

After successful completion of the course, students are able to independently design and simulate an analog integrated circuit with cadence, which is a standard software in the area of IC-design. Furthermore they are able to layout the circuit. They are also able to design a printed circuit board for high frequency applications.

Subject of course

Design and layout of an IC with Cadence

Design of PCBs

Teaching methods

The students practice design and layout of an analog integrated circuit. Furthermore they practice the layout of a printed circuit board (PCB) for high frequency applications.

Mode of examination




Course dates

Wed11:00 - 11:3002.10.2019 Bib. 354Vorbesprechung
Mon13:15 - 17:0021.10.2019 - 11.11.2019 Bib. 354Vorlesungsteil
Tue12:15 - 16:0022.10.2019 - 26.11.2019 Labor 1Cadence Labor Gruppe Di
Wed13:15 - 17:0023.10.2019 - 27.11.2019 Labor 1Cadence Labor
Mon13:00 - 17:0020.01.2020 Bib. 354Vorlesungsteil
Advanced Course Circuit Design - Single appointments
Wed02.10.201911:00 - 11:30 Bib. 354Vorbesprechung
Mon21.10.201913:15 - 17:00 Bib. 354Vorlesungsteil
Tue22.10.201912:15 - 16:00 Labor 1Cadence Labor Gruppe Di
Wed23.10.201913:15 - 17:00 Labor 1Cadence Labor
Mon28.10.201913:15 - 17:00 Bib. 354Vorlesungsteil
Tue29.10.201912:15 - 16:00 Labor 1Cadence Labor Gruppe Di
Wed30.10.201913:15 - 17:00 Labor 1Cadence Labor
Mon04.11.201913:15 - 17:00 Bib. 354Vorlesungsteil
Tue05.11.201912:15 - 16:00 Labor 1Cadence Labor Gruppe Di
Wed06.11.201913:15 - 17:00 Labor 1Cadence Labor
Mon11.11.201913:15 - 17:00 Bib. 354Vorlesungsteil
Tue12.11.201912:15 - 16:00 Labor 1Cadence Labor Gruppe Di
Wed13.11.201913:15 - 17:00 Labor 1Cadence Labor
Tue19.11.201912:15 - 16:00 Labor 1Cadence Labor Gruppe Di
Wed20.11.201913:15 - 17:00 Labor 1Cadence Labor
Tue26.11.201912:15 - 16:00 Labor 1Cadence Labor Gruppe Di
Wed27.11.201913:15 - 17:00 Labor 1Cadence Labor
Mon20.01.202013:00 - 17:00 Bib. 354Vorlesungsteil
Course is held blocked

Examination modalities

Ongoing assesment of the work in the lab and a test where a circuit has to be layouted. A PCB has to be designed.

Course registration

Begin End Deregistration end
12.09.2019 00:00 07.10.2019 17:00 07.10.2019 17:00

Group Registration

GroupRegistration FromTo
Gruppe Dienstag02.10.2019 13:26
Gruppe Mittwoch02.10.2019 13:26



No lecture notes are available.

Previous knowledge

Knowledge of circuit design

Preceding courses

Accompanying courses


  • Attendance Required!