354.064 Advanced Course Circuit Design
This course is in all assigned curricula part of the STEOP.
This course is in at least 1 assigned curriculum part of the STEOP.

2017W, VU, 4.0h, 6.0EC, to be held in blocked form

Properties

  • Semester hours: 4.0
  • Credits: 6.0
  • Type: VU Lecture and Exercise

Aim of course

advanced knowledge of analog integrated circuit design

Subject of course

Design and layout of an IC with Cadence

Design of PCBs

Lecturers

Institute

Course dates

DayTimeDateLocationDescription
Mon13:15 - 17:0023.10.2017 - 13.11.2017 Bib. 354Vorlesungsteil
Tue13:15 - 17:0024.10.2017 - 05.12.2017 Labor 1Cadence Labor
Tue12:00 - 15:4528.11.2017 Lab 1Cadence Lab
Mon13:00 - 17:0015.01.2018 Bib. 354Vorlesungsteil
Advanced Course Circuit Design - Single appointments
DayDateTimeLocationDescription
Mon23.10.201713:15 - 17:00 Bib. 354Vorlesungsteil
Tue24.10.201713:15 - 17:00 Labor 1Cadence Labor
Tue07.11.201713:15 - 17:00 Labor 1Cadence Labor
Mon13.11.201713:15 - 17:00 Bib. 354Vorlesungsteil
Tue14.11.201713:15 - 17:00 Labor 1Cadence Labor
Tue21.11.201713:15 - 17:00 Labor 1Cadence Labor
Tue28.11.201712:00 - 15:45 Lab 1Cadence Lab
Tue05.12.201713:15 - 17:00 Labor 1Cadence Labor
Mon15.01.201813:00 - 17:00 Bib. 354Vorlesungsteil
Course is held blocked

Course registration

Begin End Deregistration end
07.09.2017 00:00 06.10.2017 00:00 06.10.2017 00:00

Curricula

Study CodeObligationSemesterPrecon.Info
066 504 Master programme Embedded Systems Not specified
066 507 Telecommunications Mandatory elective
066 508 Microelectronics and Photonics Mandatory elective

Literature

No lecture notes are available.

Miscellaneous

  • Attendance Required!

Language

German