Nach positiver Absolvierung der Lehrveranstaltung sind Studierende in der Lage...

 After successful completion of the course, students are able to understand asynchronous design and test methodologies, and to have basic knowledge about the concepts of token-based computing, self-timed logic as well as to asynchronous design tools based on hardware description languages and graphical formal languages (eg. Petri nets and Signal Transition Graphs). The course will also give the students understanding of the importance of design for low power in modern systems-on-chip, and present methods for achieving energy-efficient solutions in ubiquitous computing applications, such as wireless sensor networks and energy-autonomous systems.

The lecturer of this course will be Alex Yakovlev / Newcastle University

Contact details: alex.yakovlev@ncl.ac.uk

Outline Syllabus

1. Introduction to Async design: principles, methodology, design styles overview, applications (2 hours)
2. Models: Petri nets, STGs (2 hours)
3. Synthesis from STGs: basics (2 hours)
4. Synthesis from STG: advanced (2 hours)
5. Verification (2 hours)
6. Metastability, synchronizers, arbiters (2 hours)
7. Application: Analog-mixed signal design (2 hours)
8. Application: Machine learning (2 hours)
9. GALS (2 hours)
10. Design automation developments (2 hours)

This will be a lecture with discussions.

Practicals can be arranged (optionally) for those who would like to familiarise themselves with the details of the methods of synthesis of asynchronous controllers and interfaces, as well as visualisation of concurrency models in the form of Petri nets. For this the Workcraft tool will be introduced and several exercises (of varying difficulty) offered.

This is a guest professor course of the TU Wien Informatics Doctoral School / Doctoral College "Resilient Embedded Systems".

The course is open to all PhD students and interested Master students.

This course will be held online via ZOOM: https://tuwien.zoom.us/j/91047490710?pwd=eGtwanp2bll2QXZWOHBlWnBmUEg3Zz09

ECTS breakdown:

20h lectures
10h preparation for lectures
  6h exercises
12h preparation for exercises
  2h exam
24h preparation for exam

There will be an exam at the end of the course. In addition, the performance in the exercises will be considered for the final grade.

Please register in TISS.

Essential Reading References

J. Sparso, and S.Furber, Principles of Asynchronous Circuit Design, Kluwer AP,2002

C.J. Myers , Asynchronous Circuit Design,  John Wiley  & Sons,2001

J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev,  Synthesis of Asynchronous Controllers and Interfaces,  Springer-Verlag, 2002

A good understanding of (synchronous) digital design techniques is required.