After successful completion of the course, students are able to...

• understand the structure and functioning of processors and (networked) computer systems
• explain the hardware/software interface
• explain the factors that influence the execution speed of a program
• evaluate the performance of a system
• explain the role of hardware design in the performance of a system
• explain the interconnection of computer systems and the functioning of communication protocols
• understand the principles of modern computer architectures and computer networks
• apply the knowledge they have learned and transfer it to other processor architectures and (networked) computer systems
• solve tasks with self-organization and on their own responsibility, using time management and meeting deadlines

• Storage elements and memory
• Synthesis and analysis of sequential logic
• Processors: instruction set (RISC-V), pipelining, performance analysis
• Caches and memory hierarchies
• Parallelism in multi-core processors
• Memory models
• Heterogenous computing
• Interconnection of multiple computers ("Internet")
• Network protocols (e.g., TCP, IP)
• Routing protocols
• Access protocols (e.g., Ethernet)

The learning activities include lectures, exercises in small groups ("blackboard exercises"), as well as two written tests (+ one substitute test).

Preliminary meeting: Mon. 4.03.2024, 10 a.m. (c.t.), lecture hall GM5. In this unit, organizational matters are clarified and the contents of the course are motivated.

The lectures take place on Monday from 10:00 (c.t.) - 12:00 in lecture hall GM5 and on Thursday from 9:00 (c.t.) - 11:00 in HS17. First regular lecture on Thu, 7.03.2024.

All lectures will be recorded and made available via TUWEL.

Effort estimation (ECTS Breakdown): 150 hours = 6 ECTS

    Lecture attendance + revision sessions (50 hours)
    Attendance tests (4 hours)
    Exercise attendance (14 hours)
    Preparation/follow-up exercise (50 hours)
    Follow-up lecture and test preparation (32 hours)

All information, learning materials and the details for the exercises can be found in the TUWEL course of the course.

For further questions please contact: lva-computersysteme@list.tuwien.ac.at

To pass the course successfully a minimum number of exercise examples must be solved and an overall positive performance in the presentation of solved examples is required in the exercise units. In addition, two written tests must be passed throughout the semester. The exact details will be announced in the preliminary meeting and can be found in the slides for the preliminary meeting in the TUWEL course.

Further information and materials is available at TUWEL.

Students are expected to have basic knowledge of number representations in computers and circuit algebra. Furthermore, students are expected to be familiar with the formal modeling of automata (Mealy/Moore).