competent knowledge of logic design as well as of the limitations of the synchronous design paradigm knowledge of the most relevant asynchronous design methods ability to solve sophisticated design problems

limitations of synchronous design, metastability, GALS-Systems, asynchronous design methods, handshake principles, comparison of synchronous and asynchronous logic, on-chip fault tolerance, reconfigurable logic

http://ti.tuwien.ac.at/ecs/teaching/courses/ The course comprises lectures as well as several blocks during which problems that have been assigned as homework are discussed. The overall grading considers contributions made during the lectures and the discussion blocks, the quality of the homeworks, and the performance in a final written exam.

preliminary lecture on Oct. 4th, 2010 at 10:00 am in the seminar room for computer engineering (entrance Operngasse)